-> MI_PANEL

MI_PANEL (Panel initialization, geometry, etc.)

Sigmastar MI_PANEL API

The Sigmastar MI_PANEL API documentation for customer development.

Overview of MI_PANEL:

`MI_PANEL` is responsible for setting up the display panel's parameters. It allows you to modify settings such as geometry, timing, and more. Adjustments made to these settings directly affect the hardware level of the display and should be performed with caution

Hey! Some info for you!

- MI_PANEL has to be initialised (in C) with the required geometry data. Miyoos version isn't publicly available however, you can reverse engineer it

by using the panel output data below

- If you push in bad settings, you can always revert by rebooting!

Example of MI_PANEL Commands:

CatModuleInfo: cat /proc/mi_modules/mi_panel/mi_panel0

pattern: echo pattern [r] [g] [b] > /proc/mi_modules/mi_panel/mi_panel0

pattern: echo setssc [enable/disable] [span] [step] > /proc/mi_modules/mi_panel/mi_panel0

pattern: echo settiming [hbp] [hbp_value] [htotal] [htotal_value] > /proc/mi_modules/mi_panel/mi_panel0

pattern: echo setmipidsi [hbp] [hbp_value] > /proc/mi_modules/mi_panel/mi_panel0

Example of MI_PANEL status output:

/proc/mi_modules/mi_panel # cat mi_panel0

PanelName:K101_IM2BVL

--------------------------------------- PANEL Dev0 Info -------------------------------------

LVDS_POL LVDS_CH LINK_TYPE TI_MODE

0 0 MIPI_DSI 1

SW_ODD SW_EVEN SW_ODD_RB SW_EVEN_RB

0 0 0 0

H_Total V_Total Width Height H_Start V_Start

780 515 640 480 42 18

hbp hspw hfp vbp vspw vfp

24 20 96 13 5 17

DClk FrameRate INV_DCLK INV_DE InvHSync InvVSync

26 0 0 0 1 1

SSC_Enable SSC_Step SSC_Span TI_BIT Format chnswap

disable 0 0 8BIT 8BIT (2,4,3,1,0)

--------------------------------MIPI CONFIG-------------------------------

HsTrail HsPrpr HsZero ClkHsPrpr ClkHsExit ClkTrail

3 2 5 2 4 4

ClkZero ClkHsPost DaHsExit ContDet Lpx TaGet

10 10 4 0 16 26

TaSure TaGo Hactive Hpw Hbp Hfp

22 50 640 120 120 120

Vactive Vpw Vbp Vfp Bllp Fps

480 5 13 17 0 60

lanemode format ctrlmode SyncCalibrate VirHsyncSt VirHsyncEnd VsyncRef DataClkSkew

2lane rgb888 sync_pulse 1 431 441 32978 9

PolChn0 PolChn1 PolChn2 PolChn3 PolChn4

0 0 0 0 0

/proc/mi_modules/mi_panel #

Example of MI_PANEL interaction:

Change the hardware back porch setting:

echo "settiming hbp 15" > /proc/mi_modules/mi_panel/mi_panel0

Change the display width:

echo "settiming width 320" > /proc/mi_modules/mi_panel/mi_panel0